IBM推出0.7nm芯片技术,采用新型nanostack架构将晶体管垂直堆叠,取代传统平面缩放。指甲盖大小面积可容纳近1000亿个晶体管,性能较其2nm节点提升50%,能效提升70%,SRAM缩小40%。该技术突破原子尺度工程极限,有望让AI芯片、手机、服务器等更快更省电。
IBM debuts world's first sub-1 nanometer chip.
They just announced a 0.7nm chip technology.
(0.7nm is about 100,000 times thinner than a human hair, only a few atoms across as a technology marker,)
It stops treating smaller chips as a flat-layout problem and starts stacking transistors upward through a new nanostack architecture.
A chip node no longer means every feature has that exact size, but 7 angstroms means IBM is pushing transistor design into a scale where individual atoms start to shape the engineering limits.
Traditional scaling packs more switches side by side, while nanostack vertically staggers nanosheet transistors, letting each layer use different materials for speed or lower power instead of forcing one transistor recipe across the chip.