We believe the MI455 is the first known chip to ship with active Local Silicon Interconnect (LSI) bridges, the chiplet-to-chiplet links inside a CoWoS-L package.
In CoWoS-L's short history, those bridges have always been passive: wiring and capacitors, nothing more. Active LSIs carry real circuitry. At ISSCC 2026, TSMC demoed active bridges with a low-power repeater that regenerates signals mid-channel.
Why it matters: once the bridge shares the signal-integrity burden, the PHYs on the top dies can shrink meaningfully at near-zero energy cost, reclaiming leading-edge silicon and shoreline for compute and memory.
The giveaway that this is a shipping product rather than a research vehicle: the interposer TSMC showed matches the MI455 exactly. Two base dies, twelve HBM4 stacks, two IO dies.